MediaTek packaging choices are putting Intel and TSMC into a sharper contest for the advanced assembly technologies that sit behind custom artificial intelligence chips, as cloud customers search for capacity, cost control, and supply-chain flexibility.
The Taiwanese chip designer said on May 29 that it supports both Taiwan Semiconductor Manufacturing Co.’s CoWoS technology and Intel’s EMIB technology for custom silicon programs. Reuters reported the comments from Taipei, where MediaTek executives framed the dual approach as a way to let customers choose between competing advanced-packaging routes.
The announcement matters because MediaTek is no longer only a mobile-chip supplier in this conversation. The company is pushing deeper into custom data-center silicon, has doubled its 2026 data-center revenue forecast to $2 billion, and is positioning itself for a custom AI application-specific integrated circuit market it estimates could reach $70 billion to $80 billion in 2027.
Why MediaTek Packaging Matters To AI Chips
MediaTek packaging strategy is emerging at a moment when artificial intelligence hardware is being reshaped by bottlenecks beyond the processor itself. Advanced packaging determines how chips, memory, and supporting components connect inside a system, making it central to performance, power use, and manufacturability.
That makes the company’s support for both TSMC and Intel more than a supplier update. It signals that custom AI chip designers and cloud customers are increasingly treating packaging as a strategic choice, not merely a downstream manufacturing service.
MediaTek Packaging Gives Customers Optionality
Reuters reported that MediaTek Senior Vice President Vince Hu said the company supports both TSMC’s Chip-on-Wafer-on-Substrate technology and Intel’s Embedded Multi-die Interconnect Bridge technology. The point of the message was choice: customers can weigh performance, supply, cost, and availability before locking in a packaging path.
CoWoS has become a critical part of the AI accelerator boom because it is widely used for high-performance chips, including systems built around Nvidia processors. Its strength lies in integrating compute and high-bandwidth memory at the scale required for modern training and inference workloads.
Intel’s EMIB is positioned differently. Rather than relying on a large interposer, EMIB uses embedded silicon bridges to connect chiplets. That can appeal to customers looking for alternatives when CoWoS capacity is tight, especially for application-specific chips where design priorities may differ from the highest-bandwidth GPU architectures.
For MediaTek, the ability to support both technologies helps it sell itself as a neutral custom-silicon partner. It can work with hyperscale customers that want to avoid being locked into one packaging supplier while still relying on TSMC for many advanced manufacturing needs.
AI Chip Demand Pushes Packaging Into The Foreground
The AI market has made packaging capacity one of the industry’s most valuable resources. The performance of a data-center accelerator depends not only on leading-edge wafer fabrication, but also on how efficiently the final package connects compute dies, memory stacks, networking components, and power delivery systems.
That is why packaging constraints can affect everything from chip delivery schedules to cloud capacity planning. If customers cannot secure enough advanced packaging, they may face delays even when chip designs and wafer capacity are available.
TrendForce reported earlier in May that MediaTek had been pursuing a dual advanced-packaging strategy as CoWoS capacity remained tight and Intel’s EMIB emerged as an alternative for AI ASIC projects. The later Reuters report added a public company confirmation that MediaTek supports both approaches.
The difference between rumor and confirmation is important for investors and customers. MediaTek’s comments give the market a clearer signal that dual packaging is not just a speculative supply-chain story, but part of how the company is presenting its custom AI chip business.
Intel EMIB Gains A Higher-Profile Opening
Intel has been trying to prove that its foundry and advanced-packaging businesses can win external customers in high-value markets. MediaTek’s comments give Intel a useful proof point because EMIB is being discussed as a credible option for custom AI silicon, not just as an internal Intel technology.
The development does not mean Intel has displaced TSMC as MediaTek’s core partner. MediaTek executives and Taiwan reporting continue to describe TSMC as a long-standing and important manufacturing partner. But the willingness to place EMIB beside CoWoS changes the competitive narrative around advanced packaging.
MediaTek Packaging Could Validate Intel’s Foundry Pitch
Intel’s foundry strategy depends on persuading customers that it can provide differentiated manufacturing and packaging capabilities, especially in markets where the company is trying to rebuild external confidence. EMIB is one of the technologies Intel can present as a practical alternative to incumbent packaging routes.
Reuters reported that Intel’s EMIB technology is being considered for custom AI chips MediaTek is designing for Alphabet’s Google, citing people familiar with the matter. MediaTek has not publicly named Google as a custom-chip customer and did not comment on whether EMIB might be used for Google-related designs.
That distinction is important. The confirmed fact is MediaTek’s support for both TSMC and Intel packaging technologies; the customer-specific details remain based on sourced reporting and analyst interpretation rather than a public customer announcement.
Even with that caution, the strategic implication is clear. If Intel can win advanced-packaging work tied to major custom AI programs, it gains a foothold in one of the fastest-growing parts of the semiconductor supply chain without needing to displace TSMC across the entire fabrication stack.
TSMC CoWoS Remains The Benchmark
TSMC still holds the strongest position in advanced AI chip manufacturing and packaging. Its CoWoS technology is deeply embedded in the current AI accelerator ecosystem, and MediaTek continues to rely on TSMC for advanced process nodes and packaging technologies.
The Taipei Times reported that MediaTek executives said the majority of chips still use TSMC’s CoWoS technology and that TSMC remains a key long-term partner. The same report said MediaTek plans to use TSMC’s U.S. capacity, including 4-nanometer chips from Arizona next year and 3-nanometer chips from the second Arizona fab in 2028.
That means the story is not a clean switch from one supplier to another. It is a diversification story. MediaTek is keeping TSMC at the center of its roadmap while leaving room for Intel’s EMIB where customers see advantages in capacity, cost, or design fit.
For TSMC, the competitive pressure is still meaningful. Even partial adoption of alternative packaging options can shift negotiating dynamics, especially if hyperscalers want more leverage and more resilience in the face of AI infrastructure demand.
Custom Silicon Becomes A Larger MediaTek Business
MediaTek packaging strategy is tied to a broader move into custom silicon for data centers. The company built its global position in mobile processors, but the AI boom has opened a new market for chip designers that can help cloud platforms build purpose-built accelerators.
That transition could change how investors value MediaTek. A larger AI ASIC business would give the company exposure to data-center infrastructure spending, which has become one of the most important growth engines in global technology markets.
MediaTek Packaging Supports A $2 Billion Revenue Target
Reuters reported that MediaTek reiterated it had doubled its forecast for 2026 data-center sector revenue to $2 billion. The Taipei Times separately reported that the ASIC business is becoming a new growth engine and that MediaTek expects the business to contribute multiple billions of U.S. dollars next year.
Those figures show why advanced packaging is strategically important. A custom AI chip business cannot scale on design capability alone. It needs reliable access to manufacturing, packaging, memory integration, and system-level supply chains that can meet hyperscale demand.
MediaTek’s market estimate also points to the scale of the opportunity. The company sees the custom AI ASIC total addressable market reaching $70 billion to $80 billion in 2027 and is targeting a 10 percent to 15 percent share, according to Reuters.
That target would place MediaTek in a competitive field that includes established custom-silicon enablers, internal cloud design teams, and suppliers trying to capture more of the economics behind AI infrastructure. Packaging breadth can help MediaTek argue that it can meet customers where their design and capacity needs differ.
Cloud Customers Are Rewriting The Supplier Map
Hyperscale customers are no longer satisfied with buying only merchant accelerators. Many are building or commissioning custom chips to improve cost, performance per watt, and workload-specific efficiency. That shift has opened space for companies such as MediaTek to expand beyond their traditional markets.
Custom silicon also changes supplier relationships. A cloud company may use one partner for design, another for wafer fabrication, another for packaging, and additional partners for assembly, testing, server integration, and deployment. The winning ecosystem is increasingly modular.
In that environment, a dual packaging strategy can become a commercial advantage. It allows MediaTek to offer customers a path through capacity constraints and to support designs that may not need the same packaging characteristics as the most powerful training GPUs.
The risk is complexity. Supporting multiple packaging routes can increase engineering demands, qualification work, and coordination across suppliers. MediaTek will have to show that optionality does not become operational friction as its data-center business grows.
Supply Chain Implications For Investors And Executives
The wider implication is that the AI supply chain is becoming more distributed and more contested. Fabrication remains crucial, but advanced packaging, substrates, memory integration, and system assembly are now central to competitive advantage.
MediaTek’s latest comments also show how quickly the center of gravity in semiconductors can move. A company best known for smartphone chips is now part of a broader contest over AI accelerators, foundry economics, packaging capacity, and cloud infrastructure.
MediaTek Packaging Adds Pressure To Advanced Packaging Capacity
Demand for advanced packaging is likely to remain elevated because AI systems require dense integration of compute and memory. If MediaTek’s custom AI chip business grows as projected, it will add another source of demand to a market already shaped by Nvidia, AMD, cloud-designed chips, and networking silicon.
That could support suppliers across packaging equipment, substrates, high-bandwidth memory, and test services. It could also reinforce the strategic importance of Taiwan’s semiconductor ecosystem, which includes chip foundries, server assemblers, component makers, and design services.
Reuters separately reported that Taiwan’s role in AI infrastructure is set to dominate Computex, with Nvidia, Intel, Qualcomm, Arm, Marvell, and other major chip executives expected to attend. The event context matters because MediaTek’s announcement lands just as the industry is preparing to discuss the next stage of AI hardware buildout.
For executives outside the semiconductor sector, the lesson is practical. AI infrastructure procurement will increasingly depend on understanding upstream capacity risks, not simply negotiating cloud-service contracts or buying finished servers.
Geography And Resilience Stay In Focus
MediaTek’s plan to use TSMC’s Arizona fabs also places the story inside the broader push for geographic resilience in semiconductor supply. Customers want access to local or diversified supply options, particularly as governments treat advanced chips as strategic infrastructure.
The company said it has multiple test chips on TSMC’s A14 process, which is expected to enter volume production in 2028, according to Reuters. That gives MediaTek a route into future manufacturing nodes while still expanding packaging options in the current AI cycle.
For policymakers, the case illustrates a subtle point. Resilience is not only about where wafers are made. It also depends on packaging capacity, design ecosystems, process-node roadmaps, and whether customers can qualify more than one route for critical products.
For investors, the same logic argues for watching the less visible parts of the AI value chain. The companies that solve packaging, interconnect, memory, and power bottlenecks may capture significant value even when they are not the most visible AI brands.
MediaTek packaging strategy does not overturn the semiconductor hierarchy overnight, but it does mark a meaningful broadening of the AI chip supply chain. As custom silicon becomes more important to cloud economics, the contest between TSMC’s CoWoS, Intel’s EMIB, and other advanced-packaging options will help determine which suppliers can turn AI demand into durable growth. For more coverage of the technology and supply-chain decisions shaping global markets, continue reading related reporting at Berrit Media.
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